CGS Bi-N-Tic Filter

Bi-N-Tic Filter panelQuantity: 1

I built version 1.1:

Bi-N-Tic Version 1.1 build page

Rev 1.11 Schematic

The later V1.4 build page:

CGS 57 Bi-N-Tic Version 1.4

This is a strange mixture of a VCO and a switched capacitor filter based on the filter presented by Jan Hall in Electronotes EN92 P14-15, which was in turn based on an idea in a 1974 issue of Electronic Design on a Biquart (twice the order) filter.

A VCO drives a pair of analog switches, switching two banks of eight 0.047uF (47nF) capacitors across op-amps (effectively creating multiple integrators), and this a multi-passband or comb filter is created at f0, f1, f2 etc.. The overall filter configuration itself should be easily recognized. Two controls are provided within the structure of the filter – damping and bandwidth. Not all combinations of these two are actually valid, some resulting in silence, but none the less, quite an array of variations is possible.

I added a CGS-56 Pulse Buffer to make the 4 sub-octaves available to the front panel.

Housed in this this Front-Panel-Express design.

Here’s a demo MP3 of the Bi-N-Tic as a VCO.

 

 

You are hearing the Bi-N-Tic ouput through a VCA. No other oscillators or filters are used. The SUB 1 output is fed back to the IN jack through another VCA driven by an LFO. SUB 2 is fed back via the SUB pot. A random voltage generator is making a little melody, using the 1V/OCT input. It’s quantized for scale tones. Over the course of two minutes I twiddled the Damping, Bandwidth and Sub pots to demonstrate a variety of timbres.

 

2 Responses to CGS Bi-N-Tic Filter

  1. Richard says:

    People interested in my circuit modifications for the Bi-N-Tic in detail should look at my CGS VCO project. I used the same resistor values in the control section of the Bi-N-Tic VCO that I selected for the stand-alone VCO.

    http://pugix.com/synth/cgs-vco-project/

    I also made a simple change to the circuit coupling the output of the VCO to the clock divider: Simply replace the 100n capacitor with a link (bare wire) from pin 6 of the CA3140 chip to the 100K resistor going into the clock circuit. It works fine and benefits from DC coupling, so that the divider continues to be clocked into the LFO range.

  2. Richard says:

    I updated this post to show both the 1.1 version that I built, plus the last version, 1.4.

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